Building RFICs for 6G and Terahertz Wireless

Read Below:

• 6G and terahertz RFIC design demands radical innovation, pushing beyond 100 GHz into D-band and G-band to unlock multi-GHz bandwidths essential for Tbps wireless, but imposing severe challenges in free-space loss, packaging and circuit linearity.

• Core building blocks like power amplifiers, mixers and phased arrays must overcome parasitics and leverage advanced techniques such as injection-locked phase rotators and glass-based AiP integration to achieve robust, efficient beamformed links.

• McKinsey Electronics equips design teams across the Middle East, Africa, and Türkiye with premier SiGe, CMOS, and RF packaging components, local technical advisory and supply chain continuity, thus empowering them to pioneer next-gen high-frequency systems with confidence.

  
  

As the wireless world sets its sights on 6G, promising data rates approaching a terabit per second and enabling immersive applications from holographic telepresence to true-to-life XR, circuit designers find themselves grappling with the most profound challenges yet in RF and mixed-signal engineering.

The push toward carrier frequencies above 100 GHz, spanning the D-band (110–170 GHz) and even exploratory G-band (140–220 GHz), represents more than a frequency hop. It is a complete re-architecting of the RFIC landscape, demanding breakthroughs in power amplifiers, frequency conversion, phased-array beamforming and highly integrated antenna-in-package systems, all while tightly coupling with advanced calibration and digital predistortion logic.

Why must we scale to 100+ GHz

At these frequencies, the incentive is straightforward: ultra-wide contiguous spectrum becomes available, cracking multi-GHz channels essential for achieving the ultra-high throughput goals of next-generation wireless. Traditional sub-6 GHz and even Ka-band systems are bandwidth-starved by comparison. However, the migration to these regimes is punishing from a system perspective. Free-space path loss climbs roughly 20 dB per frequency decade, and molecular absorption lines for water vapor and oxygen create notable absorption peaks that demand even higher transmit powers and precisely steered beams.

The only way to deliver robust links at reasonable power budgets is through dense phased arrays, each element carefully phased to create pencil-like beams with high directivity gains, offsetting the propagation penalty.

This confluence of physical constraints and throughput aspirations drives enormous circuit-level demands. Designers must stretch transistor f_max performance, engineer matching networks that tame interconnect and packaging parasitics and deliver linear, efficient amplifiers and mixers capable of handling multi-gigabit modulation schemes without introducing excessive distortion. At the same time, these systems are becoming increasingly digital-centric, with embedded DSP and machine learning engines calibrating array mismatches, compensating for thermal drift and executing real-time beam adaptation.

Key circuit building blocks and their technical hurdles

At the heart of these front ends are power amplifiers that defy classical scaling expectations. Above 100 GHz, even SiGe BiCMOS devices, long the standard for mmWave circuits thanks to their high unity-gain frequencies, begin to show severe gain roll-off due to parasitic capacitances and resistive losses in metal stacks. Designers employ a blend of techniques such as coupled-line output matching, distributed cascode chains and strategic gate-drain cross coupling (neutralization) to stabilize gain and push peak output power. Intel’s demonstration of a 130 GHz SiGe PA achieving around 9 dBm Psat with 8% power-added efficiency underscores the delicate balancing act: pushing out power without blowing up matching or compromising stability.

Mixers and frequency converters in this regime frequently turn to sub-harmonic or anti-parallel diode topologies to reduce LO frequency requirements, given the extreme difficulty of cleanly generating and distributing LO signals at 200 GHz and beyond. Injection-locked I/Q mixers present another elegant solution, leveraging oscillator phase noise shaping to maintain quadrature accuracy directly on chip. Imec’s triple-stub matched CMOS mixers in 22 nm FDSOI processes highlight the careful EM-aware layout practices needed to maintain consistent impedance and suppress spurious mixing products.

Perhaps the most distinct signature of these future RFICs is the migration toward advanced phased-array architectures. Traditional switched-capacitor or LC-ladder phase shifters, once ubiquitous in 24–60 GHz arrays, simply fail to offer the bandwidth or low insertion loss required above 100 GHz. Designers increasingly turn to injection-locked ring oscillator chains or traveling-wave-based phase rotators, allowing precise digital control over phase steps while minimizing die area and static power. Samsung’s 140 GHz array in 22-nm FDSOI CMOS, employing injection-locked beam steering, illustrates how deeply the boundary between digital control and analog phase shifting has blurred.

Integration and antenna-in-package constraints

Operating at these frequencies imposes ferocious penalties on packaging. Traditional bondwire or via transitions become unacceptable sources of inductance and radiation loss. As a result, advanced antenna-in-package (AiP) solutions have become non-negotiable. These might be realized on glass-integrated substrates, leveraging low-loss transmission lines and embedded patch or slot antennas directly atop transceiver die. TSMC’s InFO_AiP platforms and Murata’s LTCC-based high-frequency modules are among the commercial paths tackling this problem, delivering low-loss chip-to-antenna interconnects that would be nearly impossible with conventional PCB interconnects.

However, packaging is only half the integration story. Modern systems are increasingly driven by embedded calibration engines that actively monitor amplitude and phase across array elements. Self-injection DACs inject precisely tuned test tones that sweep through operating bands, enabling on-the-fly digital compensation for amplitude tilt or phase skew introduced by thermal gradients or aging. Co-simulation platforms, such as Cadence Virtuoso coupled with Keysight SystemVue, have become essential to model not just the core circuits, but the EM coupling, thermal gradients and behavioral calibration loops as a unified system.

Hybrid beamforming: balancing power and flexibility

One of the more elegant solutions to the overwhelming power burden of full digital beamforming at these bandwidths is the rise of hybrid architectures. Instead of driving thousands of fully digitized streams, systems deploy analog beam steering via controlled phase shifts, followed by modest-resolution ADCs (often just 3 or 4 bits) to capture spatial streams.

This approach dramatically reduces the energy per bit while preserving enough flexibility to execute dynamic beam adaptation and multi-user spatial multiplexing — critical for urban macro deployments where reflections and user mobility constantly reshape the channel.

Toward a new generation of RF circuit design

From imec’s demonstration of 140 GHz phased-array CMOS transceivers with digitally assisted injection-locked phase rotators, to Intel’s high-linearity SiGe amplifiers pushing toward the edge of device f_max and the antenna-in-package innovations from TSMC and Murata that marry RF with EM structure in a single assembly, the roadmap to 6G and beyond is being paved by deep, device-aware circuit engineering. It is a realm where gate resistance, substrate losses and even packaging thermal coefficients are as much a part of the design canvas as gain or noise figure.

As these architectural rises transform the wireless and high-frequency landscape, component selection, sourcing continuity and deep technical collaboration become pivotal. McKinsey Electronics, with its extensive portfolio spanning active, passive and RF front-end components from top-tier global manufacturers, is strategically positioned to support engineering teams across the Middle East, Africa and Türkiye in building the next generation of terahertz systems. Headquartered in Dubai and with access to cutting-edge SiGe, advanced CMOS and specialized packaging solutions, along with local on-ground technical support and robust supply chain expertise, McKinsey Electronics helps innovators navigate the complexities of high-frequency circuit design, ensuring they have both the technological foundation and the on-ground support to accelerate toward 6G and beyond.

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